1. Field of the Invention
The present invention relates to a semiconductor device such as a one-chip microcomputer including a plurality of circuit blocks (macros) and a method for testing the semiconductor device.
2. Description of the Related Art
In a prior art one-chip microcomputer, macros are connected in series by connections between input terminals and output terminals. In order to test the connections, a boundary scan path is provided. Note that the boundary scan path is also used for testing the functions of the macros. This will be explained later in detail.
In the above-described prior art one-chip microcomputer, however, when the number of macros as well as the number of connections thereof is increased, an area for the hardware of the boundary scan path is required. Thus, the integration would be reduced. Further, it is impossible to completely test the connections.
It is an object of the present invention to provide a semiconductor device including a plurality of macros capable of enhancing the integration and enabling complete testing of the connections of the macros.
Another object is to provide a method for testing such a semiconductor device.
According to the present invention, a semiconductor device includes a common bus and a plurality of macros connected in series by connections. Each of the macros is constructed by an internal circuit, a buffer connected between an input of the internal circuit and the common bus, a register connected to the common bus, and a logic circuit for selecting one of an output signal of the internal circuit and an output signal of the register.